San Jose, Calif.
March 28, 2007
Hardware-Assisted Verification Solution to be Showcased at Power.org Collaboration Lounge During ESC
EVE, a leader in hardware assisted verification, today introduced direct support for Power ArchitectureT technology in embedded applications.
Based on EVE's ZeBu (for Zero Bugs) family, Power Architecture users now have an environment that offers the best aspects of traditional emulation and rapid prototyping systems for system-on-chip (SoC) hardware debugging and embedded software validation.
EVE will showcase its ZeBu solution at the centrally located Power.org Collaboration Lounge during the Embedded Systems Conference running April 3-5 at the McEnery Convention Center in San Jose, Calif. Attendees will see "Power-based" gaming stations alongside a "Power"-supported ZeBu-UF.
Typical ZeBu-UF (Ultra Fast) users can now run their Power Architecture designs in tens of megahertz ranges for faster verification or validation. With its high-capacity --up to six-million application specific integrated circuit (ASIC) gates --, easy setup and debugging associated with emulation and the price/performance of rapid prototyping, ZeBu-UF is ideal for block or SoC-level verification.
Based on the Xilinx VirtexT4-LX200 and a PCI extension, ZeBu-UF plugs directly into a desktop PC and integrates with the logic simulators that most chip designers use, as well as with C/C++/SystemC/SystemVerilog models at extremely fast speed.
"We are proud to support the Power Architecture platform and of our partnership with the innovative Power.org community," remarks Joseph Rothman, EVE's senior vice president of Business Development. "Power Architecture technology offers a proven alternative for cutting edge SoC embedded applications. With ZeBu, Power Architecture designs can begin early firmware development and verify entire SoC systems."
For more information, contact Rothman. He can be reached at (408) 881-0440 or via email at joseph@eve-team.com.