- Cycle vs. Transaction-Based Verification: see what impact various testbench styles have on the speed of rendering of a graphics processor engine
- Linux Boot: watch Linux boot in emulation and see how HW/SW Co-Verification really works
- MPEG-4 Decoder: watch a SystemVerilog VMM testbench drive an Mpeg-4 decoder design at the transaction-level, rendering video in real-time
- Acceleration: run Verilog, VHDL and SystemVerilog testbench and design faster, without modifying your verification environment.
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ZeBu emulation enables the system level verification of your design, but how do you make sure that your testbench isn't the bottleneck? EVE's library of off-the-shelf transactors and the ZEMI-3 SystemVerilog transactor compiler allows you build a high performance verification environment quickly and easily. This demo highlights the features of ZEMI-3, and demonstrates the transactors in action in an H.264 application.
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ZeBu is an advanced hardware-assisted verification platform that combines the best aspects of traditional emulation and rapid prototyping systems into a single, unified environment for both ASIC/SoC debugging and embedded software validation. With the high capacity, easy setup and debugging associated with emulation, and the price/ performance of rapid prototyping, EVE enables both hardware designers and software developers to collaborate on a common design representation.
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Can you cycle-accurately boot a complete operating system and debug concurrently at the hardware and software level? With ZeBu, a hardware-assisted verification platform, you can. This demo walks you through a few HW/SW bugs encountered during the boot of a Linux kernel and web browser application software, and shows how bugs in hardware and software can be isolated, reproduced and fixed faster than ever before.