ZeBu-UF Fast ASIC Emulator
With the high capacity, easy setup and debugging associated with emulation, but orders of magnitude better in price and performance, ZeBu-UF (Ultra Fast) is ideal for block-level verification and for the system integration phase of the design cycle where multiple logic blocks and embedded software all must be verified together. Hardware design and software development teams can share the same system and design representation, and can easily collaborate when debugging complex hardware/software interactions. The net effect is that hardware/software integration takes place much earlier in the design cycle, thereby reducing silicon respins and accelerating time to market.ZeBu-UF is built as an extended PCI card via a motherboard-daughtercard approach and is based on the Xilinx Virtex4-LX200. ZeBu-UF plugs directly into a desktop PC and integrates with the logic simulators that most chip designers use, or with C++, SystemC and SystemVerilog models. An in-circuit emulation interface connects ZeBu-UF to a target system and/or hard IP cores via a maximum of 360 single-ended I/O pins, plus 24 LVDS pairs. In addition, ZeBu-UF interfaces with popular embedded software debuggers via a 32-pin interface, called SmartICE, or via a virtual JTAG transactor for added flexibility and remote usage.
Features
- Rapid setup: completely automated compiler from RTL so that you don't have to modify the RTL at all
- Design Capacity: 750k to 6M ASIC gates; up to 512 MB of design memory
- Emulation Speed: up to 40 MHz design clock (system clock is 300 MHz)
- Comprehensive Hardware Debugging: full visibility at run-time without recompilation
- Integrated with popular Hardware Design Tools: co-simulation with VCS, NC and ModelSim; debug with Verdi
SEE ALSO
- Datasheet: ZeBu-UF
- Demo: Linux Boot
- Solution: Super-Block Verification
- Solution: HW/SW Co-Verification
