THE LEADER IN HARDWARE/SOFTWARE CO-VERIFICATION
Solutions
Early HW/SW Co-Verification and Pre-Silicon Software Validation are critical to guaranteeing that your end product will be fully functional and meet its design goals, on time.
- Early on, speed up your existing Verilog, VHDL or SystemVerilog simulation by an order of magnitude with Simulation Acceleration
- Exhaustively test all your sub-systems with Super-Block Verification
- When time comes to verify the full chip together, use Fast SOC Emulation
- Before tape-out, ZeBu brings you the guarantee that all the pieces of your product work together by performing early HW/SW Co-Verification and Pre-Silicon Software Validation
Fast and efficient Transaction-Level Modeling is the enabler for many of the ZeBu's features. It is the underlying technology behind ESL Co-Emulation.
ATPG Vector Simulation in particular and Functional Gate-Level Simulation in general benefit even more from the acceleration that ZeBu offers, with typical speed-up in the 100X-1000X range.
ZeBu is not only useful for SOC and ASIC verification, its high-performance, compact hardware makes it the ideal vehicle for Reconfigurable Computing.
