THE LEADER IN HARDWARE/SOFTWARE CO-VERIFICATION
Super-Block Verification
Super-blocks (also called sub-systems) of your ASIC design typically implement highly specialized functions, such as video encoding and decoding, encryption, packet classification, etc...
ZeBu allows you to verify those super-blocks more exhaustively than any other approach, so you can build full confidence in your design as early as possible, even before full-chip integration.
Benefits of ZeBu
- Go deep: thanks to the very high performance (tens of MHz), you can reach and verify corner conditions, run full streams of data through the super-block and analyze its performance and throughput
- Easy Compilation Flow: the ZeBu compiler will digest the RTL of your super-block and take care of everything automatically
- Powerful Testbench Environment: thanks to our unique high-performance transaction-level interface, you can write software testbenches very easily in C++ or SystemVerilog that exercice all the scenarios of the design that you want.
SEE ALSO
- Product: ZeBu-P
- Product: ZeBu-UF
- Demo: MPEG-4 Decoder
Example of super-block
This shows an example of a super-block performing H.264 decoding, mapped in ZeBu and interacting with an AHB bus transactor and a Display transactor.